The present disclosure relates to a semiconductor device, and more specifically, a semiconductor device including a vertical stack of gate spacers and a method manufacturing the same.
Selective epitaxy is employed in many semiconductor processing steps including formation of raised source and drain regions. In a selective epitaxy process, a semiconductor material is deposited on semiconductor surfaces, while not depositing on dielectric surfaces. While a selective epitaxy process of a semiconductor material can form many useful structures, accidental exposure of a semiconductor surface prior to the selective epitaxy process causes unwanted growth of the semiconductor material directly on such accidentally exposed semiconductor surface. For example, physical exposure of a top portion of a gate electrode including a semiconductor material by an overetch of a dielectric material layer during formation of a gate spacer can lead to unwanted deposition of a semiconductor material on the top portion of the gate electrode during formation of raised source and drain regions. Thus, a method is desired for systematically preventing such unwanted exposure of a semiconductor material from surfaces of a protruding structure in a semiconductor device.